1. Field of the Invention
This invention relates to a semiconductor device, and more particularly to a semiconductor device of the trench gate structure based on the superjunction structure.
2. Background Art
Circuits such as switching power supplies and inverters are based on power semiconductor devices including switching devices and diodes. Typically used are vertical power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) having a source, a gate, and a drain arranged vertically. Power semiconductor devices are required to have such characteristics as high breakdown voltage and low on-resistance (RON). The on-resistance (RON) of a vertical power MOSFET greatly depends on the electric resistance of the conduction layer (hereinafter referred to as drift layer) portion. The doping concentration determining the electric resistance of the drift layer cannot be increased above the limit corresponding to the breakdown voltage of the pn-junction formed by the base region and the drift layer. Thus there is a tradeoff between the device breakdown voltage and the on-resistance (RON) which depend on the device material. Improving this tradeoff has been a serious problem for vertical power MOSFETs.
Vertical MOSFETs to solve this problem include those of the superjunction structure. Instead of the n-type layer in the conventional structure, the superjunction structure has p-pillar regions and n-pillar regions alternately buried in the drift layer portion. By equalizing the amount of impurities contained in the p-pillar region and the n-pillar region, the drift layer is artificially made a non-doped layer. During the off-time, a horizontally spreading depletion layer maintains high breakdown voltage. During the on-time, a current is allowed to flow through the n-pillar region doped with high concentration. Thus, the superjunction structure has realized a device with a high breakdown voltage and a low on-resistance (RON) over the limit of the material.
Actually, the lateral period of the superjunction structure needs to be decreased for improving the tradeoff between the breakdown voltage and the on-resistance (RON) using the superjunction. Furthermore, the lateral period of the MOS gate structure, or the so-called cell pitch, also needs to be decreased simultaneously for reducing the overall on-resistance (RON) of the device.
In response to these requirements, a vertical MOSFET has been proposed (U.S. Pat. No. 5,216,275), where the MOS gate structure is based on the trench gate structure. For example, a vertical MOSFET of the trench gate structure shown in FIG. 4 of the '275 patent has a superjunction structure where n-pillar regions 6 and p-pillar regions 7 are alternately buried in a drift layer 5. A control gate electrode G is formed via a gate insulating film 1 in the trench provided in the p-base region 3. During the on-time, a channel is formed in the p-base region 3 being in contact with the gate insulating film 1, and a current flows from the source region 2 to the drain region 4.
In the trench gate structure described above, the trench bottom needs to be formed as deep as or deeper than the p-base region 3 for ensuring the channel. When the trench gate bottom is formed deeper than the p-base region 3, the electric field is maximized at the trench gate bottom during application of high voltage. Hence avalanche breakdown due to high voltage occurs at the trench bottom. Holes generated by the avalanche breakdown flow into the p-base region 3 via the MOS channel. Because of high release resistance of the channel against holes, holes are not rapidly released, and the avalanche withstand capability is decreased. Furthermore, carriers generated by the avalanche breakdown impinge into the gate insulating film 1, thereby decreasing the reliability of the gate insulating film.
Thus, there is a problem that vertical MOSFETs of the trench gate structure have lower avalanche withstand capability and hence lower reliability of the gate insulating film than lateral MOSFETs.